UJT Relaxation oscilltor

Aim: -

To design and simulate UJT Relaxation Oscillator circuit.

Components: -

Name	EDWin Components Used	Description	Number of components required
UJT	UJT	Uni-Junction Transistor	1
RES	RC05	Resistor	3
CAP	CASE-A600	Capacitor	1
VDC	VDC	DC voltage source	1
GND	SPL0	Ground	2

Theory: -

UJT is an uni-junction device. This single pn junction device consists of a lightly doped n-type silicon bar. The p- type impurity is diffused into the base producing the pn junction. The above figure shows the equivalent circuit of UJT. The resistance of the silicon bar is called inter base resistance R_BB represented by the two resistors in series viz. Rb1 and Rb2. The pn junction is represented in the emitter by a diode D. The operation of UJT may be explained in three different modes.

1. With no voltage applied to the UJT, the inter base resistance is given by

R_bb=R_b1 + R_b2

2. If a voltage V_bb is applied between the bases with emitter open, the voltage will divide up across R_b1 and R_b2.

Voltage across Rb1,

Or

The ratio is called the intrinsic stand-off ratio represented by h . Thus . The value of h lies between 0.51 and 0.82. The voltage across Rb1 is which reverse biases the diode. Hence emitter current is zero.

3. If a progressively rising positive voltage is applied to the emitter the diode will become forward biased when input voltage exceeds h V_bb by V_d, the forward voltage drop across the silicon diode. Now the emitter current increases regeneratively until it is limited by the emitter power supply. Here we can define the peak point voltage of the UJT,

.

Thus when input positive voltage to the emitter is less then V_p, the pn-junction remains reverse biased and the emitter current is practically zero. When the input voltage exceeds V_p, the diode is forward biased and the emitter current reaches a saturation value limited by Rb1and the forward resistance of pn-junction.

UJT Relaxation Oscillator circuit, mainly used for triggering purposes is shown above. This circuit is ideally suited for triggering an SCR – since UJT is capable of generating sharp, high powered pulses of short duration whose peak and average power don’t exceed the power capabilities of the SCR gate for which they are intended. When power is applied to the given circuit, capacitor C starts charging exponentially through R to the applied voltage V_CC. The voltage across C is the voltage-V_e applied to the emitter of UJT. When C is charged to V_p, then UJT turns ON. This greatly reduces the effective resistance between emitter and base1 of UJT. A sharp pulse of current flows from base1 to emitter, discharging C through Rb1. When the capacitor voltage drops below V_p, UJT is brought back to the previous state and the capacitor again begins to charge towards V_bb. This produces a sawtooth wave.

In the circuit diagram shown above Rb1 and Rb2 are used to protect UJT from overheating. This inturn provides sharp pulses across them: Rb1 produces a positive spike and Rb2 produces a negative spike.

Design: -

Oscillator frequency

Intrinsic stand-off ratio h =0.4 to 0.6

h =0.5 (we take)

substituting the value of h in (1)

Capacitor C is charged through R towards supply voltage V_BB. As long as capacitor voltage V_E is below a stand-off voltage V_P set by the voltage across B1-B2 and the transistor stand-off ratio h .

Sweep Amplitude = V_P-V_V

from design specification

Design of R

At peak point emitter voltage V_E=V_P and current through R is given by

At valley point

Design of Capacitor

Design of R_B1 and R_B2

At the point where the capacitor voltage is equal to V_P assuming I_E=0A, the network of fig 4 results. V_P is the voltage required to turn on the UJT.

But the intrinsic stand-off ratio h is given by the equation

Also

Substituting (a) and (b) in equation (10) we get

R_B2 is chosen as a low value resistor. Let it be 100W .

Hence the above equation becomes

Procedure: -

EDWinXP -> Schematic Editor: The circuit diagram is drawn by loading components from the library.Wiring and proper net assignment has been made. The values are assigned for relevant components.

EDWinXP -> Mixed Mode Simulator: The circuit is preprocessed. The test points and waveform markers are placed at C, Rb1 and Rb2. The Transient Analysis parameters have been set. The Transient Analysis is executed and output observed in the Waveform Viewer.

Result:

The output waveform may be observed in the waveform viewer.